Abstract
A field programmable gate array (FPGA) implementation of the Gabor-type filter is presented. The implementation uses the forward Euler approximation with optimal step size to solve the CNN cell-state equation. The FPGA is implemented on Xilinx Spartan XC3S400 device using 219 slices. An image of dimension 60 times 60 can be processed without using any external RAM only with the block RAM.
Keywords
Field-programmable gate array
Computer science
Block (permutation group theory)
Dimension (graph theory)
Gabor filter
Filter (signal processing)
Field (mathematics)
Computer hardware
Type (biology)
Parallel computing
Image (mathematics)
Artificial intelligence
Computer vision
Mathematics
Subject Areas
Neural Networks Stability and Synchronization
·Computer Networks and Communications ·Physical Sciences
Neural Networks and Applications
·Artificial Intelligence ·Physical Sciences
Neural dynamics and brain function
·Cognitive Neuroscience ·Life Sciences
Citations by Year
2012: 2
2013: 1
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