Journal Article

·2021

Low Noise High Linearity Current Readout Topologies for Potentiostat Circuitry

S. Toprak YTU , Revna Acar Vural YTU , Okan Zafer Batur

Abstract

In this work, two current readout architectures are investigated for potentiostat design; bidirectional current conveyor based potentiostat (BCC-P) and first generation current conveyor based potentiostat (CCI-P). They are designed in CMOS 180 nm TSMC technology with standard 1.8 V supply voltage and are evaluated in terms of input referred noise, linearity, accuracy, current range and power consumption. The integrated input referred noise of the BCC-P and CCI-P circuits are 0.432 pA and 153 pA between 0.01 Hz - 1 kHz, respectively. Although each circuit has similar opamps circuits, BCC-P is found to be more advantageous in terms of current linearity and noise.

Keywords

Potentiostat Linearity CMOS Current conveyor Electrical engineering Noise (video) Electronic circuit Electronic engineering Transimpedance amplifier Current mirror Materials science Voltage Engineering Capacitor Computer science Operational amplifier Physics Amplifier Transistor Electrode

Subject Areas

Analog and Mixed-Signal Circuit Design ·Biomedical Engineering ·Physical Sciences
Advanced Memory and Neural Computing ·Electrical and Electronic Engineering ·Physical Sciences
Advancements in Semiconductor Devices and Circuit Design ·Electrical and Electronic Engineering ·Physical Sciences

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