Low voltage low power neuron circuit design based on subthreshold FGMOS transistors and XOR implementation

Abstract

In this work, design of low-voltage low-power analog artificial neural network (ANN) circuit blocks by using subthreshold floating-gate MOS (FGMOS) transistors and a neuron circuit is implemented. The circuit blocks, four-quadrant analog current multiplier and FGMOS based differential pair, have been designed and simulated in CADENCE environment with TSMC 0.35μm process parameters. Using the proposed neuron circuits a neural network was realized. XOR problem was applied to test accuracy of the network and the results were concluded.

Keywords

Subthreshold conduction Transistor Computer science Cadence Threshold voltage Electronic circuit Circuit design XOR gate CMOS Voltage Electronic engineering Logic gate Electrical engineering Engineering Embedded system Algorithm

Subject Areas

Analog and Mixed-Signal Circuit Design ·Biomedical Engineering ·Physical Sciences

Neural Networks and Applications ·Artificial Intelligence ·Physical Sciences

CCD and CMOS Imaging Sensors ·Electrical and Electronic Engineering ·Physical Sciences

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Low voltage low power neuron circuit design based on subthreshold FGMOS transistors and XOR implementation

Abstract

Keywords

Subject Areas

Citations by Year

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References (14)

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