Abstract
In this paper, a neural network hardware implementation of pattern recognition using n-input neuron circuits is presented. Floating-gate MOS (FGMOS) based neuron model using four-quadrant analog multiplier with rail-to-rail linear input and FGMOS based differential comparator has been designed and simulated in HSPICE environment. Using the proposed low voltage neuron circuits a neural network was realized. Iris plant data set, which is one of the most well-known pattern recognition databases, was applied to test accuracy of the network.
Keywords
Comparator
Computer science
Electronic circuit
CMOS
Multiplier (economics)
Artificial neural network
Transistor
Electronic engineering
Artificial intelligence
Computer hardware
Voltage
Electrical engineering
Engineering
Subject Areas
Neural Networks and Applications
·Artificial Intelligence ·Physical Sciences
Analog and Mixed-Signal Circuit Design
·Biomedical Engineering ·Physical Sciences
CCD and CMOS Imaging Sensors
·Electrical and Electronic Engineering ·Physical Sciences
Citations by Year
2020: 1
2022: 1
2024: 1
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