Evren Cesur

Design of wireless sensor network for Internet of Things structure

Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator

IEEE Transactions on Circuits and Systems I Regular Papers

Realization of processing blocks of CNN based CASA system on CPU and FPGA

Design of a third generation Real-Time Cellular Neural Network emulator

Realization of preprocessing blocks of CNN based CASA system on FPGA

Handwritten character recognition application by using Cellular Neural Network

3-D spatio-temporal Gabor-type filter implementations with Time-Derivative Cellular Neural Networks

On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters

IEEE Transactions on Circuits & Systems II Express Briefs

Demonstration of the Second Generation Real-Time Cellular Neural Network Processor: RTCNNP-v2

Demo: An improved FPGA implementation of CNN Gabor-type Filters

An improved FPGA implementation of CNN Gabor-type filters

A new control structure for the pipelined CNN processor arrays

2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010)

An FPGA implementation Of 2-D CNN gabor-type filter