V. Tavşanoglu

Real-time Frame Buffer Implementation based on External Memory using FPGA

Procedia Computer Science

Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator

IEEE Transactions on Circuits and Systems I Regular Papers

Realization of processing blocks of CNN based CASA system on CPU and FPGA

Design of a third generation Real-Time Cellular Neural Network emulator

Realization of preprocessing blocks of CNN based CASA system on FPGA

Handwritten character recognition application by using Cellular Neural Network

3-D spatio-temporal Gabor-type filter implementations with Time-Derivative Cellular Neural Networks

Design of an Automatic Target Recognation algorithm

On an Improved FPGA Implementation of CNN-Based Gabor-Type Filters

IEEE Transactions on Circuits & Systems II Express Briefs

Demonstration of the Second Generation Real-Time Cellular Neural Network Processor: RTCNNP-v2

Efficient Simulation of Time-Derivative Cellular Neural Networks

IEEE Transactions on Circuits and Systems I Regular Papers

On the teaching of the axiomatics of physical systems

Demo: An improved FPGA implementation of CNN Gabor-type Filters

2nd order 2-D spatial filters and Cellular Neural Network implementations

An improved FPGA implementation of CNN Gabor-type filters

A new control structure for the pipelined CNN processor arrays

2010 12th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA 2010)

On the simulation of time derivative cellular neural networks

European Signal Processing Conference

A new simulation method for Time-Derivative Cellular Neural Networks

European Signal Processing Conference

A new Cellular Neural Network emulator architecture processing video real-time

A new approach to emulate CNN on FPGAs for real time video processing